With fast advancements in electronic products, designs of integrated circuits gradually progress towards high-density developments to satisfy market requirements, and so a size of a semiconductor element is constantly miniaturized in response. Due to structural issues, a conventional transistor encounters various challenges such as a short-channel effect during the miniaturization process. That is, with a shortened channel, a threshold voltage (Vth) of a transistor is decreased to lead to an increased leakage current that further incurs a power consumption problem.
The U.S. Pat. No. 7,199,000 discloses a method for fabricating a semiconductor element. In the above disclosure, to suppress short-channel effect, a transistor is fabricated on a silicon-on-insulator (SOI) to reduce a leakage current.
However, such type of SOI made of silicon dioxide is more costly than a monocrystalline silicon substrate utilized by a common semiconductor fabrication process. As a result, production costs involving the SOI made of silicon dioxide are raised to lead to a high production cost issue, which degrades price competitiveness compared to a conventional semiconductor element.